DC-DC · Isolated Converter · Virtual Lab

Push-Pull (Isolated) DC-DC Converter Simulator

An advanced, physics-accurate simulator of the push-pull converter — two switches alternately driving a center-tapped transformer primary to deliver two power pulses per period into a full-wave-rectified LC output filter. Sweep the duty D (per switch, ≤0.5), turns ratio n = Ns/Np, filter and load, add a real device model, and watch every waveform update on a real-time oscilloscope — validated live against Vo = 2·n·Vs·D, with a flux-imbalance / staircase-saturation analyzer, a 2·Vs switch-stress meter, CCM/DCM detection, efficiency and a ripple-spectrum FFT.

Push-pull isolated DC-DC converter circuit diagram: DC input voltage Vs, two MOSFET switches alternately driving a center-tapped transformer primary, full-wave secondary rectifier and an output inductor-capacitor LC filter feeding a load resistor R with output voltage Vo = 2·n·Vs·D
Push-pull converter — two switches drive a center-tapped primary 180° apart; the full-wave secondary and LC filter give Vo = 2·n·Vs·D with ripple at twice fsw.

Parameters

Each switch ≤ 50%. Dead-time fills the rest of each half-period.
V
Asymmetry between the two switches — drives the flux staircase.

Transformer & output filter

Two pulses/period → output ripple at 2·fsw. Lc = (1−2D)·R/(4·fsw).

Device & parasitics model

Ideal (all 0) gives Vo = 2·n·Vs·D exactly; add parasitics to see the real drooped output and losses.

Sampling & display

Points plotted per switching period

Presets

Waveforms to display

Waveforms — one steady-state switching period

rectified node Vo output i_Lo output inductor i_mag (flux)
LIVE

Flux imbalance & switch stress (push-pull-specific)

DC flux walk (magnetizing DC offset)
With matched switches the magnetizing current is symmetric about zero and no DC flux builds. A volt-second mismatch makes it staircase toward one rail — the core saturates. Increase the mismatch slider to see the flux walk.
Switch voltage stress ≈ 2·Vs

Efficiency & conduction-loss breakdown

Estimated efficiency (conduction losses)
Power lost in each component, computed from the true integrated currents: MOSFETs Rds(on), diodes Vf, inductor DCR and capacitor ESR.

Ripple spectrum analysis

Output-voltage ripple / distortion (relative to |DC|)
FFT of the output voltage — note the dominant ripple at the 2nd harmonic (twice f_sw). Toggle to the inductor-current spectrum above.

Measurements

Live accuracy check — simulation vs closed-form theory

Output voltage  
Inductor ripple  

What is a push-pull converter?

A push-pull converter is an isolated DC-DC topology in which two switches alternately drive a center-tapped transformer primary. On one half-cycle the first switch pulls current through the upper half-winding; on the next, the second switch pushes current through the lower half — hence "push-pull." The secondary is full-wave rectified and feeds a buck-like LC output filter. Because there are two power pulses per switching period, the output voltage is twice that of a single-switch forward stage and the output ripple is at twice the switching frequency, allowing a smaller filter.

How it works

  • Switch 1 ON (0 → D·T): the upper primary sees Vs; the secondary applies n·Vs to the LC filter and the output inductor current ramps up.
  • Dead-time: both switches off; the rectifier freewheels (node = 0) and the inductor current ramps down.
  • Switch 2 ON (T/2 → T/2+D·T): the lower primary sees Vs in the opposite polarity; the full-wave rectifier again applies n·Vs — a second power pulse.
  • Dead-time again to the end of the period.

Key equations

Vo = 2 · n · Vs · D (ideal, CCM, n = Ns/Np, D ≤ 0.5 per switch)
Vswitch(off) ≈ 2 · Vs · ripple frequency = 2 · fsw
Δi_Lo = (n·Vs − Vo)·D/(Lo·fsw) · Lc = (1 − 2D)·R/(4·fsw)

This simulator numerically integrates the real push-pull switching circuit — two power pulses per period into the output LC, plus the transformer magnetizing current — to steady state, then compares the measured Vo and ripple to the equations above in the accuracy panel.

Flux imbalance & staircase saturation (topic-specific)

The push-pull's Achilles' heel is flux imbalance. If the two switches do not apply exactly equal volt-seconds — through unequal on-times, unequal Rds(on) or asymmetric gate drive — the transformer core accumulates a small DC flux each cycle. That flux staircases toward one saturation rail; once the core saturates the magnetizing current spikes and can destroy the switches. Real designs prevent it with current-mode control or a small series blocking capacitor. Use the volt-second mismatch slider and watch the magnetizing-current trace develop a growing DC offset and trip the saturation alarm.

Switch voltage stress

When one switch conducts, autotransformer action places roughly 2·Vs across the off switch (plus leakage ringing). This is the main disadvantage versus the half-bridge, whose switches only block Vs — so the push-pull is preferred at low input voltages (12/24/48 V) where 2·Vs is still comfortable.

Advanced options in this simulator

  • Two-switch drive with dead-time: duty limited to 0.5 per switch, two power pulses per period.
  • Flux-imbalance analyzer: introduce a volt-second mismatch and watch the DC flux walk and saturation alarm.
  • 2·Vs switch-stress meter: live off-state switch voltage.
  • Device model: MOSFET Rds(on), diode Vf, inductor DCR and capacitor ESR; the accuracy check stays locked to the ideal Vo.
  • Ripple spectrum: a real FFT showing the dominant ripple at twice fsw.
  • Export & capture: CSV data, a text report, or a PNG screenshot of the scope.

The six isolated DC-DC converters

ConverterSwitchesIdeal VoSwitch stress
Flyback1n·Vs·D/(1−D)Vs + Vo/n
Forward1n·Vs·DVs·(1+Np/Nr)
Push-Pull2 (center-tap)2·n·Vs·D2·Vs
Half-Bridge2 + split capsn·Vs·DVs
Full-Bridge42·n·Vs·DVs
Phase-Shifted FB4 (ZVS)2·n·Vs·DeffVs

Explore the others: Flyback, Forward, Half-Bridge, Full-Bridge and Phase-Shifted Full-Bridge simulators. For the full theory see the Push-Pull converter tutorial.

Applications

Low-voltage, medium-power isolated supplies: 12/24/48 V battery and telecom inputs, automotive DC-DC, inverter front-ends and any design that benefits from a common-ground two-switch drive and good transformer utilisation.

Frequently asked questions

What is the output voltage of a push-pull converter?

In CCM the ideal output is Vo = 2·n·Vs·D, where D is the duty of each switch (≤0.5). Two power pulses per period double the output versus a single forward stage.

Why is the duty limited to 0.5?

Each switch conducts for at most half the period; overlapping conduction would short the center-tapped primary (shoot-through). A dead-time separates the two intervals.

What is flux imbalance / staircase saturation?

Unequal volt-seconds between the two switches leave a small DC flux each cycle. It staircases up until the core saturates. Current-mode control or a series blocking capacitor prevents it — the simulator lets you provoke it with the mismatch slider.

What is the switch voltage stress?

About 2·Vs due to autotransformer action, plus leakage ringing — the main reason push-pull is used at low input voltages.

Why is the output ripple at twice the switching frequency?

Two power pulses are delivered per switching period, so the LC filter sees a ripple fundamental at 2·fsw, allowing a smaller filter than a single-pulse topology.

Power4All · Push-Pull Converter interactive simulator. All waveforms are produced by numerical integration of the actual switching circuit and validated against closed-form theory.