DC-DC · Isolated Converter · Virtual Lab

Half-Bridge (Isolated) DC-DC Converter Simulator

An advanced, physics-accurate simulator of the half-bridge converter — two switches and two split bus capacitors that drive the transformer primary with ±Vs/2, giving two power pulses per period into a full-wave LC output filter. Sweep the duty D (per switch, ≤0.5), turns ratio n = Ns/Np, bus-cap, filter and load, add a real device model, and watch every waveform update on a real-time oscilloscope — validated live against Vo = n·Vs·D, with a split-capacitor midpoint / DC-block analyzer, a dead-time shoot-through guard, only-Vs switch stress, CCM/DCM detection, efficiency and a ripple-spectrum FFT.

Half-bridge isolated DC-DC converter circuit diagram: DC input voltage Vs, two series MOSFET switches, two split bus capacitors forming a Vs/2 midpoint, transformer primary driven with plus/minus Vs/2, full-wave secondary rectifier and an output inductor-capacitor LC filter feeding a load resistor R with output voltage Vo = n·Vs·D
Half-bridge converter — split capacitors set a Vs/2 midpoint and the primary is driven with ±Vs/2; the caps block DC so the core can't staircase. Vo = n·Vs·D.

Parameters

Each switch ≤ 50%. Dead-time prevents shoot-through.
V
Series caps set the Vs/2 midpoint and block DC.

Transformer & output filter

Two pulses/period → output ripple at 2·fsw. Lc = (1−2D)·R/(4·fsw).

Device & parasitics model

Ideal (all 0) gives Vo = n·Vs·D exactly; add parasitics to see the real drooped output and losses.

Sampling & display

Points plotted per switching period

Presets

Waveforms to display

Waveforms — one steady-state switching period

rectified node Vo output i_Lo output inductor i_mag magnetizing
LIVE

Split-cap midpoint & shoot-through guard (half-bridge-specific)

Bus midpoint Vmid (ideal = Vs/2)
The two series capacitors self-balance the midpoint to Vs/2 and block any DC current — so, unlike a push-pull, the transformer cannot staircase into saturation.
Dead-time / shoot-through margin
Switch voltage stress ≈ Vs

Efficiency & conduction-loss breakdown

Estimated efficiency (conduction losses)
Power lost in each component, computed from the true integrated currents: MOSFETs Rds(on), diodes Vf, inductor DCR and capacitor ESR.

Ripple spectrum analysis

Output-voltage ripple / distortion (relative to |DC|)
FFT of the output voltage — dominant ripple at the 2nd harmonic (twice f_sw). Toggle to the inductor-current spectrum above.

Measurements

Live accuracy check — simulation vs closed-form theory

Output voltage  
Inductor ripple  

What is a half-bridge converter?

A half-bridge converter is an isolated DC-DC topology that drives the transformer primary with ±Vs/2 using just two switches and two split bus capacitors. The capacitors are connected in series across the input to create a Vs/2 midpoint; the primary sits between that midpoint and the node between the two switches. Two power pulses per period are full-wave rectified into a buck-like LC filter. Because the series capacitors block any DC current, the half-bridge is inherently immune to the flux-staircase saturation that plagues the push-pull, and each switch only blocks Vs — half the push-pull's stress.

How it works

  • Switch 1 (top) ON: the primary sees +Vs/2 (switch node = Vs, midpoint = Vs/2); the secondary applies n·Vs/2 to the LC filter.
  • Dead-time: both switches off; the rectifier freewheels (node = 0).
  • Switch 2 (bottom) ON: the primary sees −Vs/2; the full-wave rectifier again applies n·Vs/2 — a second power pulse of opposite primary polarity.
  • Dead-time to the end of the period.

Key equations

Vo = n · Vs · D (ideal, CCM, n = Ns/Np, D ≤ 0.5 per switch)
Vswitch(off) ≈ Vs · primary voltage = ±Vs/2 · ripple frequency = 2·fsw
Δi_Lo = (n·Vs/2 − Vo)·D/(Lo·fsw) · Lc = (1 − 2D)·R/(4·fsw)

This simulator numerically integrates the real half-bridge circuit — the split-capacitor midpoint, the ±Vs/2 primary drive, the magnetizing current and the output LC — to steady state, then compares the measured Vo and ripple to the equations above in the accuracy panel.

Split capacitors, midpoint balance & DC block (topic-specific)

The two series bus capacitors do two jobs. First, they set the Vs/2 midpoint, which self-balances: any tendency toward asymmetry shifts the midpoint slightly until the volt-seconds equalise again. Second — and crucially — they block DC current from flowing in the primary, so the transformer cannot walk into staircase saturation the way a push-pull can. This simulator integrates the midpoint voltage as a real state so you can watch it settle to Vs/2, and the magnetizing current stays symmetric about zero regardless of small mismatches.

Dead-time & shoot-through

The two switches are in series across the input, so they must never conduct together — that would short the bus (a destructive shoot-through). A dead-time between them keeps each duty below 0.5. The simulator's guard shows the remaining dead-time margin and warns as the duty approaches the limit.

Advanced options in this simulator

  • Split-cap midpoint analyzer: watch the Vs/2 midpoint self-balance and block DC.
  • Dead-time / shoot-through guard: live margin as duty approaches 0.5.
  • Vs switch-stress meter: half the push-pull's stress — ideal for high-voltage buses.
  • Device model: MOSFET Rds(on), diode Vf, inductor DCR and capacitor ESR; the accuracy check stays locked to the ideal Vo.
  • Ripple spectrum: a real FFT showing the dominant ripple at twice fsw.
  • Export & capture: CSV data, a text report, or a PNG screenshot of the scope.

The six isolated DC-DC converters

ConverterSwitchesIdeal VoSwitch stress
Flyback1n·Vs·D/(1−D)Vs + Vo/n
Forward1n·Vs·DVs·(1+Np/Nr)
Push-Pull2 (center-tap)2·n·Vs·D2·Vs
Half-Bridge2 + split capsn·Vs·DVs
Full-Bridge42·n·Vs·DVs
Phase-Shifted FB4 (ZVS)2·n·Vs·DeffVs

Explore the others: Flyback, Forward, Push-Pull, Full-Bridge and Phase-Shifted Full-Bridge simulators. For the full theory see the Half-Bridge converter tutorial.

Applications

Off-line 400 V-bus supplies, server and telecom power, medium-power isolated rails, and any high-input-voltage design where the Vs (not 2·Vs) switch stress and inherent DC-block are valuable.

Frequently asked questions

What is the output voltage of a half-bridge converter?

In CCM the ideal output is Vo = n·Vs·D, where D is the duty of each switch (≤0.5). The split caps apply ±Vs/2 to the primary, so each pulse is half a full-bridge's.

Why does it use split capacitors?

They set the Vs/2 midpoint and block DC current, preventing flux-staircase saturation and letting two switches apply a bipolar ±Vs/2 primary drive.

What is the switch voltage stress?

Only Vs — half the push-pull's 2·Vs — which makes the half-bridge attractive for high-voltage input buses.

What is shoot-through?

Both series switches conducting at once, shorting the bus. A dead-time between them prevents it; the simulator's guard shows the margin.

Half-bridge vs full-bridge?

The half-bridge drives ±Vs/2 with two switches (Vo = n·Vs·D); the full-bridge drives ±Vs with four switches (Vo = 2·n·Vs·D) for the same switch stress and double the power.

Power4All · Half-Bridge Converter interactive simulator. All waveforms are produced by numerical integration of the actual switching circuit and validated against closed-form theory.