The 555 timer is one of the most widely produced ICs in history, built around an internal comparator/flip-flop pair that charges and discharges an external capacitor through external resistors. Its two most common configurations are:
During the "high" part of the cycle, the capacitor charges through both R1 and R2 in series (thigh=0.693×(R1+R2)×C). During the "low" part, it discharges through only R2 (tlow=0.693×R2×C) — the internal discharge transistor shorts the R1-to-capacitor path to ground. Because charging always involves at least as much resistance as discharging, thigh is always ≥ tlow, which is exactly why basic astable duty cycle can never go below 50%.
| Quantity | Formula |
|---|---|
| Astable frequency | f = 1.44/((R1+2R2)C) |
| Astable duty cycle | D = (R1+R2)/(R1+2R2) |
| High time | thigh = 0.693×(R1+R2)×C |
| Low time | tlow = 0.693×R2×C |
| Monostable pulse width | T = 1.1×R×C |
f = 1.44/((R1+2R2)×C), where R1 and R2 are the timing resistors (in ohms) and C is the timing capacitor (in farads).
Because the capacitor charges through R1+R2 (both resistors) but discharges through only R2, the high time is always at least as long as the low time. To get duty cycles below 50%, designers add a diode across R2 so charging bypasses R1 (through the diode) while discharging still goes through R2 alone.
T = 1.1×R×C, where R is the single timing resistor and C is the timing capacitor. The output stays high for this fixed duration after being triggered, regardless of how long the trigger signal itself lasts.
Make R1 much smaller than R2 (e.g. R1 = R2/100). As R1→0, the duty cycle formula (R1+R2)/(R1+2R2) approaches exactly 0.5, though it never quite reaches it without the diode trick, since R1 can never be truly zero in a real circuit.
Astable mode free-runs continuously, producing a repeating square-ish wave with no external trigger needed once powered. Monostable mode sits idle until triggered, then produces exactly one output pulse of fixed width T=1.1RC before returning to idle.
A standard (non-retriggerable) 555 monostable ignores new trigger pulses while its output pulse is already in progress; the timing capacitor must fully discharge and the pulse must complete before a new trigger starts a fresh pulse.
For audio-frequency astable circuits, capacitors from a few nanofarads to a few microfarads are common; for slow blinkers or long monostable delays, capacitors from several microfarads up to hundreds of microfarads are typical, paired with resistors from a few hundred ohms to several megohms.
Real resistor and capacitor tolerances (often ±5–20% for common electrolytic capacitors), plus the 555's own internal comparator threshold variations between manufacturers, typically shift the real frequency somewhat from the ideal formula's prediction — use tighter-tolerance components for more predictable timing.
Standard bipolar 555 ICs are typically usable up to a few hundred kHz to around 1 MHz depending on the specific part and supply voltage, limited mainly by internal propagation delays; CMOS versions (like the 7555) can often run faster and at lower supply voltages.
For the standard 555, no — both the astable frequency/duty formulas and the monostable pulse-width formula are derived from internal voltage-divider thresholds that scale with the supply, so they cancel out and the timing is largely supply-independent within the device's rated voltage range.
Beyond basic astable/monostable use, 555s (often with added components) are used for PWM motor speed control, tone/siren generators, missing-pulse detectors, frequency dividers, and as a building block inside more complex timing and control circuits.
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