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In a buck converter, the inductor current rises while the switch is on (charging from Vin−Vout) and falls while the switch is off (discharging through the freewheeling diode/FET at −Vout). Over one switching period this produces a triangular current waveform riding on top of the DC output current; its peak-to-peak size is the ripple current ΔIL, a key design choice that trades off inductor size, efficiency, transient response, and output capacitor requirements.
| Quantity | Formula |
|---|---|
| Ripple current | ΔIL = (Vin−Vout)×D/(f×L), D=Vout/Vin |
| Required inductance | L = (Vin−Vout)×D/(f×ΔIL) |
| Peak inductor current | Ipeak = Iout+ΔIL/2 |
| Valley inductor current | Ivalley = Iout−ΔIL/2 |
A common design rule of thumb targets ripple current between 20% and 40% of the rated output (load) current: too low wastes inductor size/cost for little benefit; too high increases core/copper loss, output capacitor ripple, and the risk of entering discontinuous conduction mode (DCM) at light load, where Ivalley would go negative.
The peak-to-peak variation in inductor current over one switching cycle, riding on top of the average (DC) output current, caused by the inductor alternately charging and discharging as the switch turns on and off.
A common rule of thumb targets 20–40% of the rated (full-load) output current, balancing inductor size/cost against efficiency, output ripple, and light-load DCM behavior.
Higher core and copper losses in the inductor, more output voltage ripple (requiring a larger output capacitor), higher peak current stress on the switch and diode, and earlier onset of discontinuous conduction mode at light load.
The inductor becomes physically larger, heavier, and more expensive than necessary, with only marginal efficiency or ripple benefit beyond a certain point, and slower transient response to load steps.
Ipeak=Iout+ΔIL/2 is the highest instantaneous current the inductor (and the switch/diode) must handle; the inductor's saturation current rating and the switch's peak current rating must both exceed this value with margin.
A mode where the inductor current falls to zero before the next switching cycle begins, typically occurring at light load when the ripple current exceeds twice the average output current (Ivalley<0 in the ideal CCM formula).
Not inherently — DCM at light load is normal and often improves light-load efficiency, but it changes the converter's control transfer function, which controller designs (and compensators) must account for if wide load range operation is required.
The general principle (V×t=L×ΔI during the charging interval) is the same, but the specific formula differs because the inductor sees different voltages during on/off times in each topology — this calculator uses the buck converter's formula specifically.
Required inductance is inversely proportional to frequency for the same ripple target; doubling the switching frequency halves the inductance needed, which is a major reason high-frequency converters use smaller inductors.
D determines how long the inductor charges (Ton=D×T) versus discharges each cycle; since ripple depends on both the applied volt-seconds and duration, D directly scales the resulting ripple current.
Select a rating comfortably above the calculated peak current (Iout,max+ΔIL/2), typically with 20-30% margin, to avoid core saturation (which causes a sudden current spike and possible switch failure) during transients or maximum load.
Generally yes for a given output capacitance and ESR, since output ripple is driven largely by the inductor ripple current interacting with the output capacitor's impedance — see our Output Capacitor Ripple Voltage Calculator.
Yes — the ideal ripple current formula (based on volt-second balance) is identical for synchronous and non-synchronous buck converters; synchronous rectification affects efficiency and light-load behavior, not the ideal ripple equation.
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