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Converter efficiency η is simply the ratio of power delivered to the load versus power drawn from the source; the difference is dissipated as heat inside the converter. That heat comes from several distinct loss mechanisms: conduction loss (I²R heating in switches, inductor windings, and PCB traces), switching loss (energy lost during each MOSFET turn-on/turn-off transition, proportional to switching frequency), and smaller contributors like gate-drive loss, core (magnetic) loss, and quiescent/control-circuit current.
| Quantity | Formula |
|---|---|
| Input power | Pin = Vin×Iin |
| Output power | Pout = Vout×Iout |
| Efficiency | η = Pout/Pin × 100% |
| Total power loss | Ploss = Pin−Pout = Σ(conduction + switching + other) |
Efficiency typically varies with load current and input voltage — conduction loss grows with I², so efficiency often drops at very high load, while switching and quiescent losses are relatively fixed, so efficiency also drops at very light load (where they become a larger fraction of a small output power). Peak efficiency usually occurs somewhere in the mid-load range.
The ratio of power delivered to the load (output power) to power drawn from the source (input power), η=Pout/Pin×100%. The remaining power is lost as heat inside the converter.
Conduction loss (I²R heating in MOSFETs, inductor, and PCB traces), switching loss (energy lost during each switch transition, scaling with frequency), plus smaller contributors like gate-drive loss, magnetic core loss, and quiescent/control current.
Switching and quiescent losses are roughly constant regardless of load, so at low output power they represent a much larger fraction of the (small) input power, pulling efficiency down.
Conduction loss scales with the square of current (I²R), so at high load it grows disproportionately faster than output power, reducing efficiency again beyond the peak-efficiency point.
Typically at 30–70% of a converter's rated maximum load, where the roughly-constant losses (switching, quiescent) and the roughly-quadratic conduction loss are both relatively small compared to output power.
All power not delivered to the load (Ploss=Pin−Pout) is dissipated as heat within the converter's components, which is exactly what thermal/heatsink design must account for.
Yes — a larger input-to-output voltage difference (higher step-down/step-up ratio) generally increases switching and conduction losses relative to output power, typically reducing efficiency compared to a smaller conversion ratio.
Approximately as Irms²×Rtotal, summing the on-resistance of switches (RDS(on)), inductor DCR, and any significant PCB trace/connector resistance in the current path.
Roughly as 0.5×Vsw×Isw×(trise+tfall)×fsw, using the switch voltage/current and its rise/fall times from the datasheet, multiplied by switching frequency — this is why lower switching frequency reduces switching loss but requires larger passive components.
Because efficiency varies significantly across the load range (light-load, mid-load, full-load), a single number does not fully describe converter performance; a full efficiency-vs-load curve is far more useful for design decisions.
Well-designed synchronous buck converters commonly achieve 90–97% efficiency at mid-to-full load; higher ratios (like very high step-down or step-up) or very light loads typically achieve somewhat lower efficiency.
Higher switching frequency allows smaller inductors/capacitors but increases switching loss; lower frequency reduces switching loss (improving efficiency) but requires larger, more expensive passive components for the same ripple performance.
Energy efficiency standards (like DOE/Energy Star) specifically regulate no-load power consumption because billions of chargers remain plugged in without a connected device, so even small standby losses add up to significant global energy waste.
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