Enter values and press Calculate.
Each added bit roughly doubles resolution and adds ≈6.02 dB of SNR — going from 8-bit to 12-bit quarters the LSB size (16× finer) and raises theoretical SNR by about 24 dB.
An analog-to-digital converter (ADC) can only represent an infinitely-variable analog voltage as one of a finite number of discrete digital codes. An n-bit ADC has 2n possible codes, so it divides its full reference range Vref into 2n equal steps. The size of one step is the LSB (least significant bit): LSB = Vref/2n — the smallest voltage change the ADC can actually distinguish.
Because every analog voltage between two adjacent code levels gets rounded to the nearest available code, every conversion carries a small, unavoidable rounding error called quantization error, bounded to ±½LSB (assuming ideal rounding to the nearest level). This isn't a flaw or a fault — it is a fundamental, unavoidable consequence of representing a continuous signal with a finite number of discrete steps, and it sets a hard floor on how precisely any ADC (however well designed otherwise) can measure a voltage.
The idealized signal-to-quantization-noise ratio for a full-scale sine wave input is SNR(dB) = 6.02n+1.76 — the famous "6 dB per bit" rule. This is a theoretical ceiling assuming a perfect ADC with only quantization noise; real ADCs also add their own analog noise, so their effective number of bits (ENOB) measured in practice is usually somewhat lower than their nominal resolution n.
| Quantity | Formula |
|---|---|
| Number of codes | 2n |
| LSB (step size) | Vref/2n |
| Maximum quantization error | ±½LSB |
| Theoretical SNR (full-scale sine) | 6.02n + 1.76 dB |
| Digital code for a given Vin | Code = ⌊Vin/LSB⌋ (0 to 2n−1) |
LSB (least significant bit) is the smallest voltage step an ADC can resolve, calculated as LSB = Vref/2n, where n is the ADC's bit resolution. It represents the voltage change corresponding to one digital code increment.
It is the unavoidable rounding error introduced when a continuous analog voltage is represented by a finite digital code. For an ideal rounding ADC, this error is bounded to ±½LSB — a fundamental limit of digitization, not a design flaw.
2n distinct codes, numbered from 0 to 2n−1. An 8-bit ADC has 256 codes, a 10-bit ADC has 1024, a 12-bit ADC has 4096, and so on.
The theoretical signal-to-quantization-noise ratio for a full-scale sine wave input is SNR(dB) = 6.02n+1.76, often summarized as "about 6 dB per bit". This is an idealized ceiling; real ADCs typically achieve somewhat less due to additional analog noise sources.
ENOB is the number of bits a real ADC effectively achieves once its actual measured SNR (including real-world noise, not just quantization) is plugged back into the SNR formula solved for n. It is almost always somewhat lower than the ADC's nominal (advertised) bit resolution.
Compare your required measurement precision (the smallest voltage change you need to distinguish) against the LSB at candidate resolutions and reference voltages. If your sensor's own noise floor is larger than the LSB, extra ADC bits beyond that point add little practical benefit.
Yes, for a fixed bit count, a smaller Vref gives a smaller (finer) LSB, since LSB=Vref/2n. The tradeoff is reduced input range — your signal must stay within the smaller reference window, and any signal that exceeds it will clip/saturate.
Code = ⌊Vin/LSB⌋ (rounding down to the nearest whole code, clamped between 0 and 2n−1). Use the "Encode a Voltage" tab above to compute this directly along with the resulting reconstruction error.
Some of that apparent noise may simply be the ADC's own quantization steps (±½LSB) rather than real electrical noise, especially at higher resolutions where LSB is already very small. Averaging multiple readings can reduce apparent noise but does not increase the ADC's fundamental resolution beyond its design.
Not necessarily — resolution beyond what your sensor's own noise floor and signal conditioning can support just adds meaningless extra digits that don't reflect real signal information, while often costing more, running slower, or needing more careful board layout to actually achieve in practice.
8-bit ADCs are largely legacy at this point; 10-bit is common in older/basic microcontrollers (e.g. classic Arduino Uno); 12-bit is very common in modern general-purpose MCUs (e.g. STM32, ESP32); 16-bit and higher is typical for dedicated precision measurement and audio ADC ICs.
Each additional bit adds about 6 dB of theoretical dynamic range/SNR. CD-quality audio uses 16-bit (about 96 dB theoretical SNR), while professional audio production commonly uses 24-bit for extra headroom during mixing and processing, even though the final release format is often still 16-bit.
Slew Rate & Bandwidth Calculator • Decibel Calculator • Op-Amp Gain Calculator • All Calculators