Bridgeless Totem-Pole PFC Converter

The highest-efficiency bridgeless power factor corrector — a fast GaN (or SiC) leg plus a slow silicon synchronous-rectifier leg shape the current with only two devices in the path. Its one catch, a current spike at the grid zero-crossing, is cured with smart phase-angle control.

Table of Contents:

Introduction

A boost PFC first rectifies the mains with a four-diode bridge and then shapes the current with a boost stage. That bridge is the weak spot: at every instant the current has to squeeze through two bridge diodes plus a boost switch or diode — three semiconductors in series, each dropping voltage and wasting power as heat. The bridgeless PFC already cut that to two devices. The bridgeless totem-pole PFC takes the idea to its limit and, thanks to modern GaN and SiC switches, has become the highest-efficiency single-phase PFC in common use.

The name comes from its shape: two switches stacked one above the other between the positive and negative DC rails, like figures on a totem pole. There are two such legs — a fast leg that chops at high frequency to shape the current, and a slow leg that flips at line frequency to sort out the mains polarity. Because it has no input diode bridge at all, it is a true bridgeless converter, and with the slow leg built from low-loss silicon MOSFETs the efficiency can top 99%.

But this topology has one well-known catch. Right at the grid voltage zero-crossing, where the mains changes polarity and the slow leg has to swap over, a sharp current spike can appear that spoils the power factor and raises harmonics. Fixing that spike cleanly is what modern digital controllers are designed to do — and one neat approach is to time everything from the phase angle of the grid voltage. This page walks through the circuit, why GaN is essential, the half-cycle working modes, the full waveforms, the zero-crossing spike and the phase-angle control that removes it.

What is a Bridgeless Totem-Pole PFC?

A bridgeless totem-pole PFC is a power-factor-correction front end that has no separate input rectifier bridge — that is exactly what “bridgeless” means here. Instead it uses two half-bridge legs connected across the DC bus, fed by a single boost inductor on the AC line:

  • A fast (high-frequency) leg — two GaN or SiC switches that turn on and off tens to hundreds of kilohertz. This leg does the boosting and the current shaping.
  • A slow (line-frequency) leg — two ordinary silicon MOSFETs that change state only twice per mains cycle. This leg acts as a synchronous rectifier, choosing which way the neutral connects to the DC bus in each half-cycle.

Because the slow leg switches at only 50 or 60 Hz, its switching loss is practically zero and its silicon MOSFETs have a very low on-resistance — so even though only two devices carry the current (just like the bridgeless PFC), the totem-pole version loses even less in conduction. That is why it edges out every other single-phase PFC on efficiency.

Totem-pole PFC block diagram: the AC line passes through an EMI filter into a totem-pole PFC cell made of a fast GaN leg and a slow silicon leg with a single boost inductor and no diode bridge, feeding a DC bus and load, while a controller shapes the current.
Figure 1: Totem-pole PFC block diagram — no diode bridge; a fast GaN leg and a slow silicon leg rectify and shape the current together.

Circuit Diagram & Construction

The single-phase totem-pole PFC is beautifully simple — five power parts:

  • Boost inductor (L) — in series with the AC line; it stores energy and shapes the input current.
  • Fast leg — Q1 (top) and Q2 (bottom): a GaN or SiC half-bridge that switches at high frequency. Its midpoint connects to the boost inductor. These two do the boosting and are driven complementary (one on while the other is off, with a small dead-time).
  • Slow leg — Q3 (top) and Q4 (bottom): a silicon MOSFET half-bridge that switches only at line frequency. Its midpoint connects directly to the AC neutral. One of the two stays on for a whole half-cycle as a synchronous rectifier.
  • Output capacitor (C) — holds up the DC bus and absorbs the twice-line-frequency ripple.
  • Load — usually the following isolated DC-DC stage, drawn here as R.
Single-phase totem-pole PFC power circuit: a boost inductor on the AC line, a fast GaN half-bridge leg (Q1, Q2), a slow silicon half-bridge leg (Q3, Q4) tied to the neutral, an output capacitor and load across the DC bus
Figure 2: Single-phase totem-pole PFC power circuit
Where the name comes from: each leg is two switches stacked vertically between the + and − DC rails — a “totem pole”. The fast leg is the totem pole that does the switching; the slow leg is a second one that handles the line polarity.

Why It Needs GaN or SiC

The totem-pole topology is decades old, but for a long time it was considered impractical. The reason is a silicon problem called reverse recovery.

In this circuit the fast leg runs in continuous conduction mode (CCM) and switches hard. When the boost switch turns off, the current has to transfer to the other switch in the same leg — and for a brief moment it flows through that device’s body diode. A normal silicon MOSFET body diode is slow: it stores charge while conducting and cannot stop instantly. When the opposite switch then turns on, that stored charge has to be swept out, creating a large reverse-recovery current spike. In a totem-pole leg this spike is severe — it causes big losses and can even look like a momentary short across the DC bus. That single problem is why silicon totem-pole PFC in CCM was never really usable, and why the industry stuck with the dual-boost bridgeless PFC (which hides fast diodes in each leg instead).

GaN (gallium nitride) transistors change everything. A GaN HEMT is a lateral device with no p-n body diode at all, so it has essentially zero reverse-recovery charge. It can carry current in reverse without storing charge, so the nasty current spike simply does not appear. SiC (silicon-carbide) MOSFETs behave almost as well — their body diode has a very small recovery charge. With either device the hard-switched CCM totem-pole leg becomes clean and efficient, which is exactly why totem-pole PFC only became a mainstream, high-volume topology after wide-bandgap switches arrived.

Fast-leg deviceReverse recovery & result
Silicon MOSFETLarge Qrr → big spike, high loss → CCM totem-pole not viable
SiC MOSFETSmall Qrr → workable, high efficiency
GaN HEMT~Zero Qrr (no body diode) → best, cleanest switching

How It Works (Half-Cycle Working Modes)

Over a full mains cycle the totem-pole PFC passes through four working modes — two in each half. The slow leg sets the stage: in the positive half it ties the neutral to the negative rail (Q4 on), and in the negative half it ties the neutral to the positive rail (Q3 on). Inside each half, the fast leg then behaves exactly like a boost converter, alternating between charging the inductor and dumping its energy into the DC bus:

Four working modes of a single-phase totem-pole PFC: positive half with Q2 charging and Q1 delivering, negative half with Q1 charging and Q2 delivering, with the slow-leg switch Q4 or Q3 conducting and the red conduction loop shown in each
Figure 3: The four working modes of the single-phase totem-pole PFC

Positive half-cycle (line above neutral, Q4 held on):

  • Mode 1 — Q2 on (charging): the low-side fast switch Q2 shorts the inductor to the negative rail. Current flows line → L → Q2 → −rail → Q4 → neutral, so the inductor charges. The output capacitor supplies the load on its own during this time.
  • Mode 2 — Q1 on (delivering): Q2 turns off and the high-side fast switch Q1 turns on as a synchronous rectifier. The inductor now discharges: current flows line → L → Q1 → +rail → through C and the load → −rail → Q4 → neutral, recharging the capacitor and feeding the load.

Negative half-cycle (neutral above line, Q3 held on) — the mirror image:

  • Mode 3 — Q1 on (charging): now Q1 is the boost switch. Current flows neutral → Q3 → +rail → Q1 → L → line, charging the inductor in the reverse direction while the capacitor holds up the load.
  • Mode 4 — Q2 on (delivering): Q1 turns off and Q2 becomes the synchronous rectifier. The inductor discharges into the bus: current returns through the load and Q2, with Q3 completing the path to the neutral.
  • Two devices at a time: in every mode exactly two switches carry the current — one fast-leg switch and one slow-leg switch — which is where the low loss and high efficiency come from.

Line-Cycle Waveforms (Deep Dive)

Stand back and watch one whole mains cycle. The two legs work on completely different time-scales, and the payoff is an input current that is a clean sine, perfectly in step with the voltage.

Totem-pole PFC line-cycle waveforms: the sinusoidal line voltage, the in-phase sinusoidal input current with small switching ripple, the fast-leg high-frequency PWM across the whole cycle, the slow-leg gates Q4 and Q3 as line-frequency squares that swap at the voltage zero-crossing, and the nearly constant output bus voltage.
Figure 4: One line cycle. The fast leg chops continuously to shape a sinusoidal input current, while the slow-leg gates simply flip at the voltage zero-crossing — Q4 conducts through the positive half, Q3 through the negative half. The output bus stays almost constant.
  • Input current iin: a smooth sine locked in phase with the voltage — near-unity power factor and low THD, with only the small fast-switching ripple riding on top.
  • Fast-leg PWM: Q1 and Q2 chop at high frequency across the whole cycle. Their duty ratio slides up and down through the cycle so the average inductor current tracks the sine of the input voltage.
  • Slow-leg gates: this is the totem-pole signature. Q4 is simply held on for the entire positive half and Q3 for the entire negative half — a lazy line-frequency square wave that swaps exactly at the voltage zero-crossing. This is why the slow leg wastes almost no switching energy.
  • Output Vout: held near constant by the capacitor, with a small ripple at twice the line frequency (100 Hz on a 50 Hz line).

Switching-Cycle Waveforms (Deep Dive)

Now zoom in to just a handful of switching periods inside the positive half-cycle. Here the fast leg looks exactly like a synchronous boost converter, with Q1 and Q2 driven complementary:

Totem-pole PFC switching-cycle waveforms: the boost switch Q2 gate, the complementary synchronous-rectifier Q1 gate, the inductor current ramping up and down in continuous conduction mode, the Q2 current carrying the rising ramp, and the Q1 current carrying the falling ramp.
Figure 5: Inside the positive half-cycle. Q2 and Q1 switch complementary; the inductor current is a triangle that rises when Q2 is on and falls when Q1 is on. The two switch currents are simply the two halves of that triangle — Q2 carries the rising part, Q1 the falling part (flowing in reverse through the synchronous rectifier).
  • Complementary gates: when Q2 (the boost switch) is off, Q1 (the synchronous rectifier) is on, and vice versa, with a tiny dead-time between them. Q1 replaces the boost diode of an ordinary boost converter — using a switch instead of a diode cuts the conduction loss even further.
  • Inductor current iL: a triangular ripple that rises while Q2 charges the inductor and falls while Q1 delivers to the bus. In CCM it never reaches zero, so peak and RMS currents stay low.
  • Switch currents: Q2 carries the rising ramp, Q1 carries the falling ramp. Add them and you get the full inductor current. Q1 conducts in the reverse (third-quadrant) direction — the very thing GaN does cleanly.

The Zero-Crossing Current-Spike Problem

The bridgeless totem-pole PFC is wonderfully efficient, but it has one famous weakness: a sudden current spike right at the grid voltage zero-crossing — the instant the mains changes polarity. This is the moment the slow leg has to swap over (Q4 turns off and Q3 turns on, or the reverse), and if that swap is even slightly mistimed the current jumps sharply. Left unchecked, these spikes distort the input current, raise the total harmonic distortion (THD) and drag down the power factor — exactly the things a PFC is supposed to keep clean.

Zero-crossing current spike in a bridgeless totem-pole PFC. Top: grid voltage as a sine crossing zero at pi. Middle: input current without phase-angle control shows a sharp spike at the zero-crossing where the slow leg swaps. Bottom: input current with phase-angle control is a clean sine with no spike.
Figure 6: The zero-crossing current spike. Without careful control (middle trace) the input current glitches hard as the slow leg swaps at the polarity change; with phase-angle control (bottom trace) the same current is a clean sine.

Why does the spike happen? Two effects combine at the crossing:

  • Slow-leg mistiming: the slow (line-frequency) leg is really a 50 Hz synchronous rectifier. Its two switches must swap exactly when the grid voltage crosses zero. If they swap a little early or late, the DC bus is briefly connected the wrong way round and a large current rushes in.
  • Inductor phase delay: the boost inductor makes the current lag the voltage slightly, so the current is not quite zero when the voltage crosses zero. Swapping the slow leg based purely on the measured voltage can therefore happen at the wrong instant for the current.
  • Abrupt duty change: the boost duty ratio has to flip its formula from one half-cycle to the other. A sharp jump charges and discharges the switch output capacitances quickly, which also shows up as a spike.

Phase-Angle Digital Control (the Fix)

The cure is to stop timing things from the raw, noisy grid voltage and instead time everything from a clean phase angle. A single-phase phase-locked loop (PLL) locks onto the mains and produces a smooth running angle θ that sweeps from 0° to 360° every cycle. Once the controller knows θ precisely, it knows the exact polarity and the exact zero-crossing — so it can swap the slow leg at just the right moment and the spike never forms. This sits on top of the usual two-loop PFC controller:

Phase-angle digital control block diagram for a bridgeless totem-pole PFC. The grid voltage feeds a single-phase PLL that outputs the phase angle theta. Theta drives a rectification logic block that times the slow silicon leg, provides a sine template to the current reference, and provides a feed-forward duty. An outer PI voltage loop and inner PI current loop set the fast GaN leg duty through a PWM block.
Figure 7: Phase-angle digital control. A single-phase PLL turns the grid voltage into a clean angle θ; that angle both times the slow-leg swap (killing the spike) and feeds the sine template and feed-forward duty into the usual outer-voltage / inner-current PI loops that drive the fast GaN leg.

Put simply, the controller does four jobs at once:

  • Outer voltage loop (PI, slow): keeps the DC bus at its target (often 390–400 V). It is kept deliberately slow so it does not fight the natural 100 Hz ripple of a single-phase PFC. Its output sets how much current to draw.
  • Inner current loop (PI, fast): forces the inductor current to follow a sine template built from θ, so the current stays in phase with the voltage — that is the power-factor correction itself. It sets the fast GaN leg’s duty every switching cycle.
  • Feed-forward duty: a duty value worked out directly from θ and the polarity is added to the current-loop output, so the duty never has to jump abruptly across the zero-crossing.
  • Phase-angle rectification: the slow leg is switched from θ (not from the noisy raw voltage), so it swaps at exactly the right instant and the zero-crossing spike is removed.

Bridgeless Totem-Pole vs Other PFCs

FeatureBoost PFCDual-Boost BridgelessBridgeless Totem-Pole
Input rectifierFull diode bridgeNone (2 boost legs)None (2 half-bridge legs)
Devices in current path322
Fast-leg deviceSi + fast diodeSi + fast diodeGaN / SiC
Return pathBridge diodesFast/slow diodesLow-Ron Si MOSFET (SR)
Typical efficiencyGoodHigherHighest (>99%)
Bidirectional?NoNoYes (if both legs active)
Best forLow–medium powerHigh powerHigh power, top efficiency

Key Parameters & Formulas

Because each half-cycle is a boost converter, the boost relations apply (vin is the instantaneous input voltage):

QuantityFormula & Value
Boost voltage relationVout = |vin| / (1 − D)
Fast-leg duty (positive half)D = 1 − |vin(t)| / Vout
Devices in conduction path2 (1 fast-leg switch + 1 slow-leg switch)
Typical DC busVout ≈ 390–400 V (above the line peak)
Output ripple frequency2f (100 Hz on a 50 Hz line)
Power factor with harmonicsPF = cosφ / √(1 + THD²)
Typical resultPF > 0.99, efficiency > 99%

Advantages & Disadvantages

Advantages

  • Highest efficiency of the common single-phase PFCs — only two devices conduct, and the slow-leg silicon MOSFETs add almost no loss.
  • Very high power density — fast GaN/SiC switching allows a smaller inductor and less heatsinking.
  • Naturally bidirectional — if both legs use active switches, power can flow back to the grid (useful for vehicle-to-grid chargers and active front-ends).
  • Keeps the core PFC benefits: near-unity power factor and low THD.

Disadvantages

  • Needs GaN or SiC switches in the fast leg — silicon MOSFETs do not work well here because of reverse recovery.
  • More complex control — two legs on different time-scales, plus careful handling of the current spike at every voltage zero-crossing.
  • Fast, careful gate drive and layout are essential; high-frequency GaN switching is unforgiving of stray inductance.
  • Still step-up only and non-isolated — like any boost PFC it needs a following isolated DC-DC stage.

Applications

  • EV on-board chargers (OBC) — the totem-pole PFC front-end feeds an isolated DC-DC (often an LLC) stage; its bidirectional ability suits vehicle-to-grid.
  • High-efficiency server, telecom and datacenter power supplies chasing 80 PLUS Titanium targets.
  • Solar micro-inverters and grid-tied single-phase converters.
  • High-end industrial SMPS and fast chargers where efficiency and size are both critical.

Frequently Asked Questions – FAQs

It is a power-factor-correction front end with no input diode bridge (that is what bridgeless means). It uses two half-bridge legs across the DC bus and one boost inductor: a fast GaN or SiC leg that switches at high frequency to shape the current, and a slow silicon leg that switches only at line frequency as a synchronous rectifier. Only two devices ever carry the current, giving efficiency above 99 percent.

Because the fast leg runs hard-switched in continuous conduction mode. During each switching transition the current briefly flows through a device body diode. A silicon MOSFET body diode recovers slowly and stores charge, creating a large reverse-recovery current spike and heavy loss that made silicon totem-pole PFC impractical. GaN transistors have no body diode and almost zero reverse-recovery charge, and SiC MOSFETs have very little, so the switching becomes clean and efficient.

The fast leg (GaN or SiC) switches at high frequency, tens to hundreds of kilohertz, and does the boosting and current shaping. The slow leg (silicon MOSFETs) switches only at the line frequency of 50 or 60 hertz; one of its two switches stays on for a whole half-cycle to route the neutral to the correct DC rail, working as a synchronous rectifier. The slow leg wastes almost no switching energy.

At the grid voltage zero-crossing the mains changes polarity, so the slow (line-frequency) leg has to swap its two switches. If the swap is slightly mistimed, the DC bus is briefly connected the wrong way and a large current rushes in. The boost inductor also makes the current lag the voltage, so the current is not quite zero at the crossing, and the boost duty ratio changes abruptly there. Together these produce the sharp current spike that raises THD and lowers the power factor.

A single-phase phase-locked loop (PLL) locks onto the mains and produces a clean phase angle that sweeps from 0 to 360 degrees every cycle. Because the controller knows this angle precisely, it knows the exact polarity and zero-crossing, so it swaps the slow leg at just the right instant. A feed-forward duty worked out from the angle also stops the duty ratio jumping across the crossing. Timing everything from the phase angle instead of the noisy raw voltage keeps the current a clean sine with no spike.

It is popular wherever efficiency and size matter most: EV on-board chargers (paired with an isolated LLC stage and often bidirectional for vehicle-to-grid), high-efficiency server and telecom power supplies aiming at 80 PLUS Titanium, solar micro-inverters, and high-end industrial power supplies and fast chargers.

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